The present invention relates to semiconductor devices, and, more particularly, to gate structures of region effect transistors and methods of fabricating the same.
Integrated circuit devices based on silicon processing technologies, specifically, metal-oxide-semiconductor (MOS) devices, e.g., region effect transistors (FETs or MOSFETs), have been fabricated with the aim of improving speeds, integration density, and operational function while reducing the cost of products as well. A typical MOS transistor is formed with the source and drain being spaced apart from each other by a channel region in a substrate. The electrical potential of the channel region is controlled by a gate that is electrically isolated from the channel region by a gate insulation film.
Typically, a process for formation of a transistor includes ion implantation, thermal oxidation, film deposition, photolithography, and/or etching. The ion implantation (or injection) process is carried out to form source and drain regions, and to adjust a threshold voltage of the transistor. The film deposition process is used to deposit a conductive material for a gate electrode or to deposit an insulation film for a gate insulation film. The thermal oxidation process may be used to deposit a gate insulation film instead of the film deposition process. The lithography and etching processes are conducted to form a deposited conductive film into a required gate pattern in general.
While such various manufacturing processes may affect characteristics of the transistors, e.g., threshold voltages, the processes of forming the gate insulation and conductive films may heavily influence the threshold voltages of the transistors. The threshold voltage of a transistor may be greatly affected by the materials used for the gate insulation and conductive films. However, the materials for the gate insulation and conductive films are typically limited to those that are suitable for integration throughout semiconductor fabrication process.
The gate insulation film is typically formed of silicon oxide while the gate conductive film is typically formed of polycrystalline silicon. The silicone oxide film can provide an excellent interface characteristic with a semiconductor substrate, such as a silicon substrate. The polycrystalline silicon may also provide an excellent interface characteristic with the silicon oxide film. Thus, the silicon oxide film may be used for the gate insulation film and the polycrystalline silicon may be used for the gate conductive material.
Recently, there have been demands for higher integration density in view of high performance, high speed, low power consumption, and economy. Therefore, to fulfill such demands for higher integration density, it may be necessary to substitute a new material for a conventional silicon oxide film that has been used as the gate insulation film of the transistor.
An insulation film with a high dielectric constant may be substituted for a silicon oxide film that has been conventionally used as the gate insulation film. For high integration of the transistor, a silicon oxide gate insulation film may be formed with a small thickness. But the thin gate insulation film may cause an increase of leakage current even if it contributes to the high integration of the transistor. For instance, electrons may tunnel through such a thin silicon oxide film to increase a leakage current therein when the gate is being supplied with a voltage over its threshold voltage. For those reasons, there have been many studies conducted for advantageously using an insulation material other than silicon oxide that has a higher dielectric constant than silicon oxide. A high-dielectric insulation material is advantageous to reducing a leakage current because its physical film thickness is much larger than that of the silicon oxide film in the range of the equivalent oxide thickness (EOT) characteristic overcoming the problems involved in the thin silicon oxide film. Recently, hafnium oxide (HfO2) has been used as the high-dielectric insulation material for the gate insulation film.
However, a high-dielectric insulation film, such as a hafnium oxide film, may be insufficient to retain an excellent interface characteristic between a gate electrode and a silicon substrate. While forming the hafnium oxide film on the silicon substrate, hafnium atoms may react with silicon atoms and thereby a Fermi level may be pinned around a conduction band of the silicon. The gate electrode formed of a polysilicon induces so-called ‘gate depletion’. Those effects of gate depletion and Fermi level pinning around the conduction band of the silicon act as factors that may increase threshold voltages of transistors.
Meanwhile, in a P-type transistor (PMOS), a polycrystalline silicon gate is doped with P-type dopant, such as boron, to adjust its threshold voltage. But the highly doped boron may cause so-called ‘boron penetration’ in which boron atoms penetrate into the silicon substrate through the gate insulation film. Further, the P-type transistor may also be affected by gate depletion, which may increase its threshold voltage.